Module paging 

paging structgure terminology:

• PML4(E) -> L4
• PDPDE(E) -> L3
• PD(E) -> L2
• PT(E) -> L1 -> (leaf) pagetable == 4K

We use 4-level 4K paging. Huge pages for userspace is not yet supported. The kernel’s ID-mapping uses 1G page (in the total of 512 G). See startup asm code.

Re-exports

pub use pagetable::*;

Modules

fault

pagetable

basic paging support. code derived from the x86_64 crate

Functions

address_space_clone^⚠

clone an paging hierarchy (fuck me why can’t I spell this fucking word.) currently the kernel part is not deep copied i.e. all PML4 entries point to the original physical addresses of L3 tables. The user part is deep-copied without COW.

get_cr3

for x86_64, return the CR3 register. this is the physical address of the page table root. TODO: use page root in task struct instead of raw cr3

get_free_page_zeroed 🔒

get_root

returns the identically mapped (+ kernel offset) virtual address of the page table

map_page

walk the page table, create missing tables, return mapped physical frame

map_range

map_vma^⚠

unsafe as it dereferences raw pointer pt_root. Must make sure it’s a valid, 4k aligned virtual address.

pt_clone_level^⚠

THIS ONLY WORKS FOR 4K PAGES! Must not use this on kernel mappings, which use huge pages. on lv==1, it’s a “page” not a pagetable, hence do memcpy.

set_cr3